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Study on Spurious Power Suppression Technique in Distributed Arithmetic Based DWT Filter Bank

IJEECC Front Page
Author(s):
Parvathy Mohan,Bency Varghese A,Sindhu T. V
Volume
4, Issue 1
Pages:
644-650
Year of Publication:
June, 2017
Indian Journal of Emerging Electronics in Computer Communications-IJEECC
ISSN:
2393-8366
Citation: Parvathy Mohan,Bency Varghese A,Sindhu T.V."Study on Spurious Power Suppression Technique in Distributed Arithmetic Based DWT Filter Bank." Indian Journal of Emerging Electronics in Computer Communications,4.1(2017):644-650.
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Abstract:
Discrete wavelet transform is a fundamental block in several schemes for image compression. The implementation requires filter banks that uses multiplications leading to a high hardware complexity. Hence using Distributed arithmetic which is a general and effective technique to implement multiplierless filter banks has already exploited to implement the discrete Wavelet transform. This work proposes a general method to implement a discrete wavelet transform architecture based on power suppressed and result biased distributed arithmetic to produce approximate results. The novelty of the proposed method relies on the use of result biasing techniques and spurious power suppression technique. Compared with previously proposed distributed arithmetic based architectures, this technique saves power at the expense of very small area augmentation.
Keywords:Distributed Arithmetic, DWT, FIR filter bank, JPEG2000, Spurious Power Suppression Technique, Sub Expression Elimination.

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